A conventional type of multi-chip module includes two semiconductor chips mounted side-by-side on a carrier substrate or in some cases on an interposer (so-called “2.5 D”) that is, in-turn, mounted on a carrier substrate. The semiconductor chips are flip-chip mounted to the carrier substrate and interconnected thereto by respective pluralities of solder joints. The carrier substrate is provided with plural electrical pathways to provide input/output pathways for the semiconductor chips both for inter-chip power, ground and signal propagation as well as input/output from the interposer itself. The semiconductor chips include respective underfill material layers to lessen the effects of differential thermal expansion due to differences in the coefficients of thermal expansion of the chips, the interposer and the solder joints.
One conventional variant of 2.5 D interposer-based multi-chip modules uses a silicon interposer with multiple internal conductor traces for interconnects between two chips mounted side-by-side on the interposer. The interposer is manufactured with multitudes of through-silicon vias (TSVs) to provide pathways between the mounted chips and a package substrate upon which the interposer is mounted. The TSVs and traces are fabricated using large numbers of processing steps.
Another conventional multi-chip module technology is 2D wafer-level fan-out (or 2D WLFO). Conventioal 2D WLFO technology is based on embedding die into a molded wafer, also called “wafer reconstitution.” The molded wafer is processed through a standard wafer level processing flow to create the final integrated circuit assembly structure. The active surface of the dies are coplanar with the mold compound, allowing for the “fan-out” of conductive copper traces and solder ball pads into the molded area using conventional redistribution layer (RDL) processing. Conventional 3D WLFO extends the 2D technology into multi-chip stacking where a second package substrate is mounted on the 2D WLFO.
Some other conventional designs use embedded interconnect bridges (EMIB). These are typically silicon bridge chips (but occasionally organic chiplets with top side only input/outputs) that are embedded in the upper reaches of a package substrate.